[MAD MBS] L3 Processor x8

2022년 2월 2일

[MAD-MBS] L3 Processor x8 for the Modular Backtest System

This is a Multibit Signal Processor with 8 Channels and 6 Bool/Timer-Blocks

it can remap each inputport ot each outputport
it can also use classic -1 0 +1 signals and map it to the a Mulitbit transfer system

it can manipulate 8 individual channels via basic gate functions like:
AND OR NOT NAND NOR XOR XNOR
im not going to explain this most basic operations here..
for exact description go here en.wikipedia.org/wiki/Logic_gate...

Basic Timer functions
Pulse(TP) only a impulse true false
Delay Pulse(TPD) only a delayed true false (signal has to remain delaytime to activate)
On Delay(TON) time delay to bit true (signal has to remain delaytime to activate)
Off Delay( TOF ) time delay to bit false
DeviationFilter ( MDP ) minimum deviation percent limits signals to each every % movement.
centerpoint 1000 S2 < 1000 S3 > 1000

Each manipulation block houses 5 Parameters
Input Channel 1
Input Channel 2 (Channel-ID or bars to pass or Percentage-shrink)
Input Channel 3 (Channel-ID or Percentage-grow)
Output Channel
Operation type (And,Or,..)

Works together with
[MAD MBS] L1 [Signals]
[MAD MBS] L2 Indicators [Trends]
[MAD MBS] L3 Processor x8 [2-3 indicators]
[MAD MBS] L4 Processor x16 - x64 [Advanced Strategys, up to 4 indicators 2 trends]
[MAD MBS] L5 Logic MK7 [Botconnector & Execution]

2022년 2월 5일

릴리즈 노트

Added the "Digitalsignal 1 0 -1 Plot for Backtester MK6 nad Backtester MK5 compatibility

Added the RATE function
messuring amount of true in given time
Example Setup
0 20 10 1 RATE (inputs channel 1, 20 bars countingtime, 10 signals needed, output 1)

2022년 2월 5일

릴리즈 노트

Bugfix, wrong libary version

2022년 2월 6일

릴리즈 노트

Simplestyle Mapping / remapping

2022년 2월 9일

릴리즈 노트

i did fix a bug - Signalin 1 0 -1 was not mapped correctly

2022년 9월 13일

릴리즈 노트

libary upgrade, little bit faster

2022년 10월 23일

릴리즈 노트

libary update